Researchers have introduced a novel design for a superconducting quantum processor, which could lead to the robust, large-scale devices required for the quantum revolution. Unlike traditional quantum chips that arrange processing qubits in a 2-D grid, the team has developed a modular quantum processor featuring a reconfigurable router at its core. This innovation allows any two qubits to connect and entangle freely, whereas prior models only enabled qubits to communicate with their nearest neighbors.
Researchers at the UChicago Pritzker School of Molecular Engineering (UChicago PME) have developed a cutting-edge design for a superconducting quantum processor, targeting a feasible architecture for large-scale, resilient devices necessary for the quantum revolution.
In contrast to conventional quantum chip designs that position information-processing qubits on a two-dimensional grid, the Cleland Lab team has crafted a modular quantum processor that includes a reconfigurable router serving as a central hub. This setup allows any two qubits to connect and entangle, overcoming the limitation of older systems where qubits could only interact with their nearest counterparts.
“A quantum computer can’t be directly compared to a classical computer in terms of parameters like memory size or CPU dimensions,” noted UChicago PME Prof. Andrew Cleland. “Instead, quantum computers leverage a fundamentally different method of scaling: while doubling a classical computer’s power necessitates a larger CPU or increased clock speeds, amplifying a quantum computer’s power requires just one more qubit.”
Taking cues from traditional computers, the design clusters qubits around a central router, akin to how PCs communicate through a central network hub. Quantum “switches” facilitate rapid connections and disconnections among qubits within a few nanoseconds, leading to high-fidelity quantum gates and the formation of quantum entanglement, an essential component of quantum computing and communication.
“In theory, there’s no upper limit to how many qubits can connect through the routers,” explained UChicago PME PhD candidate Xuntao Wu. “You can add more qubits for enhanced processing power, as long as they fit within a defined footprint.”
Wu is the lead author of a recent paper in Physical Review X that outlines this innovative approach to connecting superconducting qubits. The new quantum chip developed by the researchers is adaptable, scalable, and modular, much like the chips found in mobile phones and laptops.
“Think of a classical computer with a motherboard that integrates various components like CPUs or GPUs, memory, and others,” Wu added. “Our aim is to transpose this concept into the quantum domain.”
Dimensions and Interference
Quantum computers are immensely sophisticated yet fragile devices with the potential to revolutionize sectors such as telecommunications, healthcare, clean energy, and cryptography. To fully unleash the capabilities of quantum computers to address global challenges, two primary requirements must be met.
First, they need to be scaled to a sufficient size with flexible operation capabilities.
“Achieving this scaling can provide solutions to computational problems that classical computers struggle to resolve, such as factoring large numbers and breaking encryption,” Cleland stated.
Second, quantum computers must exhibit fault tolerance, enabling them to perform extensive calculations with minimal errors, ideally exceeding the processing capability of today’s most advanced classical computers. The superconducting qubit platform being developed here shows promise as one method to achieve this goal.
“A standard superconducting processor chip is usually shaped like a square with all quantum bits placed within,” mentioned co-author Haoxiong Yan, who graduated from UChicago PME in the spring and is now a quantum engineer at Applied Materials. “Picture a 2-D array, resembling a square lattice; that’s the layout of conventional superconducting quantum processors.”
Challenges in Conventional Design
This standard design has several drawbacks.
Firstly, arranging qubits in a grid restricts each qubit to interact with at most four others – its direct neighbors to the north, south, east, and west. Enhanced connectivity among qubits typically leads to a more powerful processor regarding both flexibility and efficiency, but the four-neighbor constraint is generally a limitation of the planar design. This indicates that scaling up the system impractically demands excessive resources for effective quantum computing applications.
Secondly, the limitation of nearest-neighbor connections constrains the types of quantum dynamics that can be realized and the extent of parallel processing the processor can achieve.
Lastly, fabricating all qubits on a single planar substrate poses significant challenges to production yield; even a small number of failures can render the processor nonfunctional.
“For practical quantum computing, we require millions or even billions of qubits, and everything must be produced flawlessly,” Yan explained.
Rethinking Processor Design
To address these challenges, the team reimagined the design of the quantum processor. It is structured to be modular, meaning that different components can be pre-selected before being installed onto the processor motherboard.
The team’s next goals include exploring methods to expand the quantum processor to accommodate more qubits, developing innovative protocols to enhance its capabilities, and possibly discovering ways to interconnect router-linked qubit clusters similarly to how supercomputers connect their processors.
They are also aiming to extend the distance over which qubits can become entangled.
“Currently, the coupling range is relatively medium-range, measuring in millimeters,” Wu revealed. “If we want to connect distant qubits, we must investigate new ways to incorporate other technologies into our existing setup.”
Funding: This research and the corresponding experiments were financed by the Army Research Office and the Laboratory for Physical Sciences (ARO Grant No. W911NF2310077) as well as the Air Force Office of Scientific Research (AFOSR Grant No. FA9550-20-1-0270)
